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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號(hào)調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場(chǎng)效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74CBTLV3257DS-Q100

Quad 1-of-2 multiplexer/demultiplexer

The 74CBTLV3257-Q100 provides a quad 1-of-2 high-speed multiplexer/demultiplexer with common select (S) and output enable (OE) inputs. The low ON resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. When pin OE = LOW, one of the two switches is selected (low-impedance ON-state) with pin S. When pin OE = HIGH, all switches are in the high-impedance OFF-state, independent of pin S. To ensure the high-impedance OFF-state during power-up or power-down, OE should be tied to the VCC through a pull-up resistor. The current-sinking capability of the driver determines the minimum value of the resistor.

Schmitt trigger action at control input, makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 2.3 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

此產(chǎn)品已停產(chǎn)

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Supply voltage range from 2.3 V to 3.6 V

  • High noise immunity

  • Complies with JEDEC standard:

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8-B/JESD36 (2.7 V to 3.6 V)

  • 5 Ω switch connection between two ports

  • Rail to rail switching on data I/O ports

  • CMOS low power consumption

  • Latch-up performance exceeds 250 mA per JESD78B Class I level A

  • IOFF circuitry provides partial Power-down mode operation

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

參數(shù)類型

型號(hào) Package name
74CBTLV3257DS-Q100 SSOP16

封裝

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購的器件編號(hào),(訂購碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74CBTLV3257DS-Q100 74CBTLV3257DS-Q10J
(935302228118)
Obsolete TLV3257 SOT519-1
SSOP16
(SOT519-1)
SOT519-1 SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE
SOT519-1_118

環(huán)境信息

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購的器件編號(hào) 化學(xué)成分 RoHS RHF指示符
74CBTLV3257DS-Q100 74CBTLV3257DS-Q10J 74CBTLV3257DS-Q100 rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (6)

文件名稱 標(biāo)題 類型 日期
SOT519-1 3D model for products with SOT519-1 package Design support 2023-02-07
cbtlv3257 IBIS model of 74CBTLV3257 IBIS model 2017-12-11
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT519-1 plastic, shrink small outline package; 16 leads; 0.635 mm pitch; 4.9 mm x 3.9 mm x 1.73 mm body Package information 2022-06-20
SSOP-TSSOP-VSO-REFLOW Footprint for reflow soldering Reflow soldering 2009-10-08
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

如果您需要設(shè)計(jì)/技術(shù)支持,請(qǐng)告知我們并填寫 應(yīng)答表 我們會(huì)盡快回復(fù)您。

模型

文件名稱 標(biāo)題 類型 日期
cbtlv3257 IBIS model of 74CBTLV3257 IBIS model 2017-12-11
SOT519-1 3D model for products with SOT519-1 package Design support 2023-02-07

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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