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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74AXP1G10GS

Low-power 3-input NAND gate

The 74AXP1G10 is a single 3-input NAND gate.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures very low static and dynamic power consumption across the entire VCC range from 0.7 V to 2.75 V. It is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

此產(chǎn)品已停產(chǎn)

Features and benefits

  • Wide supply voltage range from 0.7 V to 2.75 V
  • Low input capacitance; CI = 0.5 pF (typical)
  • Low output capacitance; CO = 1.0 pF (typical)
  • Low dynamic power consumption; CPD = 2.5 pF at VCC = 1.2 V (typical)
  • Low static power consumption; ICC = 0.6 μA (85 °C maximum)
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-12A.01 (1.1 V to 1.3 V)
    • JESD8-11A.01 (1.4 V to 1.6 V)
    • JESD8-7A (1.65 V to 1.95 V)
    • JESD8-5A.01 (2.3 V to 2.7 V)
  • ESD protection:
    • HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
    • CDM JESD22-C101E exceeds 1000 V
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 2.75 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C

參數(shù)類型

型號 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C)
74AXP1G10GS 0.7?-?2.75 CMOS ± 4.5 2.6 70 1 ultra low -40~85

封裝

下表中的所有產(chǎn)品型號均已停產(chǎn) 。

型號 可訂購的器件編號,(訂購碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74AXP1G10GS 74AXP1G10GSH
(935306307125)
Obsolete no package information

環(huán)境信息

下表中的所有產(chǎn)品型號均已停產(chǎn) 。

型號 可訂購的器件編號 化學(xué)成分 RoHS RHF指示符
74AXP1G10GS 74AXP1G10GSH 74AXP1G10GS rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (4)

文件名稱 標(biāo)題 類型 日期
74AXP1G10 Low-power 3-input NAND gate Data sheet 2017-03-30
axp1g10 74AXP1G10 IBIS model IBIS model 2015-10-12
Nexperia_document_leaflet_Logic_AXP_technology_portfolio_201904 AXP – Extremely low-power logic technology portfolio Leaflet 2019-04-05
74AXP1G10GS_Nexperia_Product_Reliability 74AXP1G10GS Nexperia Product Reliability Quality document 2022-05-04

支持

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模型

文件名稱 標(biāo)題 類型 日期
axp1g10 74AXP1G10 IBIS model IBIS model 2015-10-12

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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