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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號(hào)調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場(chǎng)效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74LVT16245BEV

3.3 V 16-bit transceiver; 3-state

The 74LVT16245B; 74LVTH16245B is a 16?-?bit transceiver with 3?-?state outputs. The device can be used as two 8?-?bit transceivers or one 16?-?bit transceiver. The device features two output enables (1OE and 2OE) each controlling eight outputs, and two send/receive (1DIR and 2DIR) inputs for direction control. A HIGH on nOE causes the outputs to assume a high?-?impedance OFF?-?state. Bus hold data inputs eliminate the need for external pull?-?up resistors to define unused inputs

此產(chǎn)品已停產(chǎn)

Features and benefits

  • 16-bit bidirectional bus interface

  • 3-state buffers

  • Wide supply voltage range from 2.7 to 3.6 V

  • Overvoltage tolerant inputs to 5.5 V

  • BiCMOS high speed and output drive

  • Output capability: +64 mA and -32 mA

  • Direct interface with TTL levels

  • Input and output interface capability to systems at 5 V supply

  • Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs

  • Live insertion and extraction permitted

  • Power-up 3-state

  • No bus current loading when output is tied to 5 V bus

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

  • Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to 85 °C

參數(shù)類型

型號(hào) Package name
74LVT16245BEV VFBGA56

封裝

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購(gòu)的器件編號(hào),(訂購(gòu)碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74LVT16245BEV 74LVT16245BEV,118
(935270795118)
Obsolete LVT16245B Standard Procedure Standard Procedure no package information
74LVT16245BEV,151
(935270795151)
Obsolete LVT16245B Standard Procedure Standard Procedure
74LVT16245BEV,157
(935270795157)
Obsolete LVT16245B Standard Procedure Standard Procedure
74LVT16245BEV,518
(935270795518)
Obsolete LVT16245B Standard Procedure Standard Procedure
74LVT16245BEVE
(935270795551)
Obsolete LVT16245B Standard Procedure Standard Procedure
74LVT16245BEVK
(935270795557)
Obsolete LVT16245B Standard Procedure Standard Procedure
74LVT16245BEV/G,51
(935281133518)
Obsolete LVT16245B Standard Procedure Standard Procedure
74LVT16245BEV/G,55
(935281133551)
Obsolete LVT16245B Standard Procedure Standard Procedure
74LVT16245BEV/G:55
(935281133557)
Obsolete LVT16245B Standard Procedure Standard Procedure

環(huán)境信息

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購(gòu)的器件編號(hào) 化學(xué)成分 RoHS RHF指示符
74LVT16245BEV 74LVT16245BEV,118 74LVT16245BEV rhf
74LVT16245BEV 74LVT16245BEV,151 74LVT16245BEV rhf
74LVT16245BEV 74LVT16245BEV,157 74LVT16245BEV rhf
74LVT16245BEV 74LVT16245BEV,518 74LVT16245BEV rhf
74LVT16245BEV 74LVT16245BEVE 74LVT16245BEV rhf
74LVT16245BEV 74LVT16245BEVK 74LVT16245BEV rhf
74LVT16245BEV 74LVT16245BEV/G,51 74LVT16245BEV rohs rhf rhf
74LVT16245BEV 74LVT16245BEV/G,55 74LVT16245BEV rohs rhf rhf
74LVT16245BEV 74LVT16245BEV/G:55 74LVT16245BEV rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (2)

文件名稱 標(biāo)題 類型 日期
74LVT_LVTH16245B 3.3 V 16-bit transceiver; 3-state Data sheet 2024-07-08
lvt16245b lvt16245b IBIS model IBIS model 2013-04-09

支持

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模型

文件名稱 標(biāo)題 類型 日期
lvt16245b lvt16245b IBIS model IBIS model 2013-04-09

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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