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Click here for more information74LVC10ADB
Triple 3-input NAND gate
The 74LVC10A provides three 3-input NAND functions.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
Alternatives
Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V
Inputs accept voltages up to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
Latch-up performance exceeds 250 mA
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
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封裝
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVC10ADB | 74LVC10ADB,112 (935260744112) |
Obsolete | no package information | ||||
| 74LVC10ADB,118 (935260744118) |
Obsolete | ||||||
環(huán)境信息
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
| 型號 | 可訂購的器件編號 | 化學成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LVC10ADB | 74LVC10ADB,112 | 74LVC10ADB |
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| 74LVC10ADB | 74LVC10ADB,118 | 74LVC10ADB |
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文檔 (5)
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| 74LVC10A | Triple 3-input NAND gate | Data sheet | 2024-01-24 |
| AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
| AN263 | Power considerations when using CMOS and BiCMOS logic devices | Application note | 2023-02-07 |
| lvc10a | lvc10a IBIS model | IBIS model | 2013-04-08 |
| lvc | lvc Spice model | SPICE model | 2013-05-07 |
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.