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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74HC2G32GD

Dual 2-input OR gate

The 74HC2G32; 74HCT2G32 is a dual 2-input OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

此產(chǎn)品已停產(chǎn)

Features and benefits

  • Wide supply voltage range from 2.0 V to 6.0 V

  • Input levels:

    • For 74HC2G32: CMOS level

    • For 74HCT2G32: TTL level

  • CMOS low power dissipation

  • High noise immunity

  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

  • Complies with JEDEC standard: JESD7A (2.0 V to 6.0 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

文檔 (3)

文件名稱 標(biāo)題 類型 日期
74HC_HCT2G32 Dual 2-input OR gate Data sheet 2023-11-17
AN10161 PicoGate Logic footprints Application note 2002-10-29
AN11044 Pin FMEA 74HC/74HCT family Application note 2019-01-09

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模型

No documents available

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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